Modern communication systems conform to stringent timing requirements to support reliable data transfer. Wireless infrastructure systems, for example, rely upon strict timing relationships to allow the use of diversity antennas with respect to both transmit and receive components of the system. Strict requirements for delay measurement also are needed to facilitate consistent timing information across different parts of the communication system. Within Common Public Ratio Interface (CPRI) and Open Base Station Architecture Initiative (OBSAI) type communication systems, for example, accuracies on the order of eight nanoseconds may be needed. In other cases, accuracies of approximately two nanoseconds may be needed.
Communication systems, including those supporting CPRI and OBSAI, usually require a mechanism that performs asynchronous, clock domain crossing. A first-in-first-out (FIFO) memory can be used for this purpose. Use of a FIFO memory, however, does present challenges in terms of delay measurement. Conventional methods of determining the transit time across, or through, a FIFO memory, e.g., the delay of signal and/or data propagation across the FIFO memory, are not sufficiently accurate for use with the sorts of communication systems described above where high levels of timing accuracy and delay measurement are needed.